Ann: Positive Results from Second Non-Platform Lot, page-272

I interpret it as there not being any extra design inputs required to integrate the second non-platform lot design into the second platform lot. No discussions between partners required, crack on with the platform lot.

Remember once the memory array is done the remaining process is considered a back end of line task. So the actual amount of "cooking" required in the state of the art fab is only a fraction of the job.

IMEC wouldn't stop someone in the middle of a fab run, but if they had a shorter than normal slot that they were confident they could get the job done in then they would be happy to oblige.