WBT (ASX) Ann: Q4FY19 Activities Update and Appendix 4C

Originally posted by Fatman8 ↑

Thttps://www.google.com/amp/s/finfeed.com/small-caps/technology/memory-capacity-breakthrough-adds-legroom-for-iot/amp

This story is from 2016
but mentions a filament size of less than 5nm worth a read.

Memory capacity breakthrough adds legroom for IoT

Published at Feb 4, 2016, in Technology

Hot on the heels of a major breakthrough earlier this month, Weebit has announced yet another technological first in the non-volatile memory space.
In Weebit developed a “nano-porous Si ReRAM” solutionmid-January, with filament size less than 5 nanometres (nm) in scale; an achievement that’s expected to empower its future products with superiority over other ReRAM contenders.
Today, Weebit has further bolstered its technical supremacy by announcing that under the leadership of highly renowned Professor James Tour, its development team has achieved a “3-D developmental milestone that will enable substantial increases in memory capacity” used in electronic devices such as watches, phones, and tablets.
Weebit’s team was able to fabricate a 1Kbit 1D-1R crossbar array consisting of SiOx (silicon oxide) bit-cells and diodes. In a world first, Weebit’s 1Kbit array demonstrates the possibility to produce an ultra-high performance 3-D memory array that can ultimately serve as a “Flash device replacement”.
If and when a 3-D memory array is manufactured, it will allow enormous memory capacity to be placed in smart watches, wearables, smartphones and all other devices requiring a storage feature.
The 1 Kbit 1D-1R crossbar array feasibility study included successful writing, storing and reading words in ASCII code to the device. Weebit also says that its diodes were fabricated with CMOS-compatible non-toxic materials to be easily integrated in the most advanced silicon processes.
Technical results

Performance metrics successfully demonstrated included:

Switching behaviour by conducting nano-filaments forming at a sub-5nm scale

Switching speed of ~50ns for set and reset process

Capability of exhibiting multi-bit switching behaviour at each cell

Currently, flash memory dominates the data storage/memory industry but is struggling to meet the heavy memory and storage demands from high-end professional users such as cloud servers and corporate data centres. For consumers, the advent of the Internet of Things has meant a greater amount of devices being used, and therefore, more data being created, shared and stored – all of which put additional strain on flash memory storage.

Inventor of Weebit’s ReRAM technology, Professor James Tour
Inventor of Weebit’s ReRAM technology Professor James Tour, said, “The materials for the diodes have now been selected and tested to work. We will now build a 2-dimensional 1 kilo-bit memory using the crossbar design with a diode atop each silicon oxide memory bit. Once that is demonstrated, we will embark on the layering of that 2-dimensional design to make a truly 3-dimensional architecture.”
The breakthrough could potentially create a patent-protected competitive advantage enabling Weebit to become a dominant force in ReRAM storage in the coming years, following the completion of the reverse takeover deal currently in progress.
Weebit hopes to produce a fully working prototype of its next generation ReRAM storage technology within the coming 18 months.

How many boxes have they ticked since this article was written???

Expand

Well i sure hope Coby and the management team open up the Box and let everyone have a look inside at the goods , starting next week .

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Ann: Q4FY19 Activities Update and Appendix 4C, page-175

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