Ann: Quarterly Activity Report & Appendix 4C, page-88

I think we should remind the newer participants here - until relatively recently, 60 nm was the smallest node size possible on IMEC's megabit commercial test platform.

IMEC is breaking new ground alongside 4DS - PCMO, area based RERAM. The new "Dory" platform that all development work is proceeding on is facilitating shrinking of the node size to 20 nm.

PL4 at 60 nm is already showing head turning results. My assessment is there are a lot of potentially interested parties who will be taking "I'll believe it when I see it" approach to what 4DS is doing, in the context that this is indeed, new ground been broken.

The entire development process from the first process lot has given the IMEC and 4DS teams grief. I don't think anyone would disagree with me that this has taken a lot longer than what was indicated prior to setting foot in the IMEC labs. However, they have shown they can overcome the technical challenges, which says to me, the fundamental science is sound and the prototype arrays that were worked on prior to IMEC weren't flukes. The challenge has been to get this gear to fab in a commercial scale process. The difference between a bespoke, hand crafted one off and a mass produced copy.

IMEC also have a vested interest in getting this to work and work well - there are bonuses for IMEC that are tied to a successful transaction.