@sumgeniusjust some random thoughts that may be of interest
also ties in with PHs' comments when in discussion with sally ward foxton during the eetimes interview re density unachievable at further scaled nodes in the x-y axis - that aligns also with the recent company narrative that 20nm was always the target node ( hash was the only voice i heard along the way who correctly claimed 20nm would be the target node)
either / or - without characterising the 'pulse' signal strength and length you cannot 'access' the area cells in total at the interface between resistive states - bulk and area trap analysis can then also be forensically detailed same same area / cell partitioning
think infineon may be running the design contract process for the 'platform' and 'test chip' through their 'digital twin' design program - worth holders digging around on that as the 'co innovate' design service arm of their business is quite extensive and would allow IMEC further real time data / input feedback along the way during the process / also expedite IMECs ongoing development on the project post infineon involvement
@patienceif 20nm tanks perhaps 45 becomes the new 20
all just speculation of course
(20min delay)