Ann: ReRAM Now in Commercialisation - Investor Presentation, page-65

Several posters are getting over-exited about WBT scaling to 1 nm. I believe they are getting this from the following graphic in the presentation:


1xnm refers to an industry node (actually a family of nodes - a 'regime') for DRAM scaling below 20nm. 1xnm = 16nm to 19nm, 1ynm = 14nm to 16nm, 1znm = 12nm to 14nm. These have been around for several years already. At the leading edge we now have also 1anm, 1bnm & 1cnm, which I believe may extend down to 10nm. This is looking like the lower limit for DRAM at this stage.

Here are a couple of articles:
https://semiengineering.com/dram-scaling-challenges-grow/
https://semiengineering.com/1xnm-dram-challenges/

So what this graphic appears to be saying is that WBT is working with Teir-1 fabs to 'evaluate' our ReRAM for sub 20nm DRAM process nodes. Presumably this would be with a view to manufacturing on existing DRAM process lines, which could even make possible a combination DRAM/ReRAM chip (or chiplet).

Still very exiting IMO. But for the record, I have my doubts that ReRAM (of any type) will ever scale much below 10nm. Will be happy to be proved wrong, but it won't be happening any time soon.