A few additional observations for those who weren't there..
Pixel Testing. While there was no presentation, Yuval did show an image of the pixel testing arrangements. I've attached a quick photo -not the best quality but highlights some useful points.
Because this technology is so unique (and so tiny), Yuval noted they had to build their own test equipment. The image below shows the pixel testing.
In the top left of the screen you can see a representation of the wafer, with the chip being tested highlighted in green. It looks as though there are 104 chips per wafer.
Below that is an image of the chip being tested (32 x 32 pixels, 1024 pixels total, about 10mm across), with the pixel being tested highlighted as a black square.
In the bottom left is a microscope image of the pixel being tested. (about 200 um across?) This enables the pixel movement to be observed, as it is unlikely to be visible to the naked eye. Yuval showed us that in the centre of the pixel being tested, you could see a tiny red dot (not visible in this photo) which is the laser used to measure the pixel movement with extreme precision.
In terms of the waveforms on the right, I understand the red square waveform was the input voltage being applied, triggering the pixel to change states (I think Yuval said it takes about 1/10 millionth of a second to respond) The large green square waveform (hard to see) shows the physical displacement of the pixel from -2um to +2.5um, giving a total travel close to the aim of around 5um. This shows nice crisp responses from the pixel, which should enable very precise digital sound reconstruction.
Pixel Yield. As noted by others, Yuval was were confident that the pixel failures were caused by contamination/ overetching as in over a dozen cases they had inspected the individual failed pixels using a scanning electron microscope and confirmed this. He felt it was a trivial issue to address with proper automated processing (rather than the manual process used for this sample), and was confident this would be readily addressed in the next batch. Importantly, he confirmed that getting to very high pixel yields is anticipated to be relatively straightforward, and they were targeting to get to 10 pixels per wafer failure rate. (ie only every 10th chip would have a single pixel out of 1024 failed), and as discussed earlier up to 5% is not audibly discernable.
Yuval noted that the ASIC has automated testing that occurs in a few microseconds on startup of the chip, to detect any faulty pixels, and if found, to latch them off.
Production scaling.
Yuval mentioned that in addition to the local Israeli fab, Tower have another 3 or 4 fabs worldwide that would likely be the next logical fabs to pursue scale production.
Timing/ Sequence of Events. My understanding is that once the new wafers have been received and tested, a key next milestone will be the development of a detailed audio specification, particularly the frequency response (ie how loud it is at different frequencies), along with distortion figures etc.
A number of folks here and at the meeting have expressed frustration at the lack of clarity on how long it will take following this point to individualise the chips, package them with ASICs and provide them to vendors for their testing.
If everything checks out well in the initial tests, I imagine a number of key vendors would be invited to see it in operation in the clean room at AKP. This to me would be the initial 'money shot' and provide share price support, and so gives me less concern about whether it then takes a couple of months to package and distribute, as I could imagine the share price would be humming by that stage.
(20min delay)