Akida 1000 is done and dusted in my opinion and that is why Peter van der Made is in WA trying to put together the high powered team of academics as fast as he can and the reason in my opinion he is on this mission is because of:
1. The developing relationship with Socionext, and
2. The following invention by Socionext and its academic partner the Tokyo Institute of Technology:
https://www.design-reuse.com/news/47500/socionext-tokyo-tech-5nm-pll.htmlPowering the future: Smallest all-digital circuit opens doors to 5 nm next-gen semiconductorLangen/Germany, 10. February, 2020 --- Scientists at Tokyo Institute of Technology (Tokyo Tech) and Socionext Inc. have designed the world’s smallest all-digital phase-locked loop (PLL). PLLs are critical clocking circuits in virtually all digital applications, and reducing their size and improving their performance is a necessary step to enabling the development of next-generation technologies.
New or improved technologies, such as artificial intelligence, 5G cellular communications, and the Internet-of-Things, are expected to bring revolutionary changes in society. But for that to happen, high-performance system-on-a-chip (SoC)—a type of integrated circuit—devices are indispensable. A core building block of SoC devices is the phase-locked loop (PLL), a circuit that synchronizes with the frequency of a reference oscillation and outputs a signal with the same or higher frequency. PLLs generate ‘clocking signals’, whose oscillations act as a metronome that provides a precise timing reference for the harmonious operation of digital devices....
For high-performance SoC devices to be realized, fabrication processes for semiconductor electronics must become more sophisticated….
This synthesizable PLL can be easily integrated into the design of all-digital SoCs, and is commercially viable,
making it valuable for developing the much sought after 5 nm semiconductor for cutting-edge applications including artificial intelligence, internet of things and many others, where high performance and low power consumption would be the critical requirements. But the contributions of this research go beyond these possibilities. “Our work demonstrates the potential of synthesizable circuits. With the design methodology employed here, other building blocks of SoCs, such as data converters, power management circuits, and wireless transceivers, could be made synthesizable as well. This would greatly boost design productivity and considerably reduce design efforts,” explains Okada.
Tokyo Tech and Socionext will continue their collaboration in this filed to advance the miniaturization of electronic devices, enabling the realization of newer-generation technologies.
(20min delay)