Ann: Suspension from Official Quotation, page-150

Exactly brother, foundaries have been all over 5nm since 2020 and ergo if Imec can't get down there and even below (3nm possibly) then the use of the term state of the art is somewhat outdated...

Regardless, the fact remains you do not need to get down below 10nm to produce a megabit memory chip... Full Stop!

So yes, I do believe it is time for a much needed additional Technical Update..... 8tey

17 August 2021
4DS TECHNICAL UPDATE
• New process breakthroughs have made 4DS’ Interface Switching ReRAM technology fully compatible
with state-of-the-art high-volume DRAM and NAND production processes

• Third Non-Platform Lot wafers yielded an order of magnitude decrease in cell on-resistance, which
translates into an up to one order of magnitude boost in read speed

• Second Platform Lot wafers demonstrated both device-scaling to imec’s minimum geometry and
memory switching with an access device on 300mm wafers using state-of-the-art production
equipment

• Third Platform Lot utilizing imec’s megabit memory platform is planned to start late Q3 2021

• HGST (100% subsidiary of Western Digital Inc) requests technical update to share the detailed results
of these two lots