CXO888 / any other attendees, page-12

1) None specifically given. Ting said unless we were developers for NVIDIA or Meta, he would not be sharing specific retention metrics as they were meaningless. Ting also said no one cares about retention greater than three months for computational data - which seems to be the new market in AI we can augment.
Howard said that our retention is persistent and tuneable, but we are much closer to DRAM than Flash. Ting said, we could tune our cells to replicate flash if we wanted to - i.e. years of retention - but this is not the market opportunity.
Further, Ting said that on the one memory chip, some cells can be tuned for speed / endurance, and others (on the same piece of silicon) can be tuned for retention. As such, we are providing solutions to the memory needs of architects - this is huge.
From what Ting said, the major opportunity is in AI and computational memory - sitting between the DRAM and the processor and holding query results for a short time before they are processed. Currently, these results are discarded without computation.

2. Yes - they have storage class memory metrics. See further comments above. However, in order to prove our memory cells are suitable for gigabit memories, we must scale down to 20nm cells. Imec limit was previously 60nm, but we did so well that imec have adjusted their platform to be 20nm for us. Further, Ting mentioned that this platform is actually a gigabit platform but with all the cells turned off apart from a million or so in the megabit - to give further confidence that a gigabit is possible.
If successful, imec will personally introduce us to 4 household names where our technology solves their development problems. Ting said we WILL BE successful at 20nm, such was his confidence, and the process and materials are seriously de-risked. Howard said again that we are NOT creating a DRAM replacement, our product is new. David said that the plan is to improve the metrics further on the re-run of the 60nm and then replicate these improved metrics on the 20nm platform lot. (Hence so excited, and all mentioned the importance of the Stanford short loops in improving the cell, giving immediate weekly results, and giving high confidence that the platform lots will work at lower geometries)

6. Not discussed - however it has been released that further updates will be provided in recent ASX announcements once upper limits of endurance are known.

16. No difficulty. It has been proven that we are transferable from fab to fab in the transfer of the technology from Stanford to imec. We are a simple back end of line process that sits on top of existing CMOS, so any memory maker can take us and implement the recipe without a problem. As for time - the time to scale down from 60nm to 20nm is less than 1 year, this is huge.
So we have shown: 150nm in PL3, 60nm in PL4/5, 20nm in PL6 (suitable for gigabit memory) This truly shows our memory is area based and is a huge endorsement for a buyer looking to develop further 30 years. We do not have the materials science problem of filamentary ram where the filament becomes the size of the whole cell at smaller nodes. Also, Ting said because our cell can scale, the power to switch on and off will also scale down. In filamentary reram, the power does not scale as the filament stays the same - which is a major drawback for the memory user that wants the power to drop proportionately to the cell size.

21. This has already started. There is some work at board level to refine the potential acquisition targets for the new guy (Peter Himes), but the sales strategy is three ponged:
1) Imec introduction to 4 household names - Ting mentioned Meta and NVIDIA in a separate question.
2) Peter and Ting to develop contacts in huge tech companies in California and the US to tell them what to expect in late Q2 /Q3 2024.
3) Our largest shareholder Kelland (93m) also has massive experience and senior contacts in this area in the US, and will help in business development.

So they have a roadmap, and they are confident to align the sale process to the 2024 development roadmap - not just sitting idly by to start the process once success at 20nm is confirmed. They are proactively telling potential acquirers what the memory can do, and asking them how they would be able to use it in their applications come Q4 2024.

Its an exciting time for 4DS - I bought another few million. In my opinion, they have done enough to sell the technology now for more than the current market cap, but 20nm will be worth 10X+ more and will open up the use case further.