Hi tomtom. I share your expectation of possible delays in finalising packaging. Whilst acknowledging that the EM industrial packaging facility will take time to complete and commission, it seems to me there was plenty of time to arrange the recent demo to have been made using a packaged Gen 1 chip or chips in a demo board.
Why was this not done? Was there no capability for packaging of a small quantity? Was the ASIC not finalised and available for packaging? Has the protective covering membrane not been finalised? Was the Gen 1 volume insufficient to penetrate that membrane? What is the purpose of the demo boards if not for demos?
Anybody know please?
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