Hi there, thanks for your responses. I will not get into...

Hi there, thanks for your responses.
I will not get into arguments but depending on the FPGA one want to use the size and power consumption can be vastly different.
The following a big one (half the palm of your hand)

Whilst as you can see this next one is really really small and uses very little power

Largest Selection of Small Footprint Packages

Microsemi's IGLOO nano low power FPGAs offer the largest selection of small footprint packages with the industry's smallest 3x3 mm micro chip scale package and six distinctive packages at 8x8 mm or less. Small size combined with the lowest-power FPGA available, starting at just 2 µW, opens new opportunities for designers of battery-powered handheld applications.
With the lowest power and smallest size in the industry, IGLOO nano devices are ideal for independent level shifting to enable support for varying voltage levels, I/O expansion or multiplexing, adapting to changing standards, and when embedded security is required to ensure fidelity of valuable intellectual property.
(Source: https://www.microsemi.com/products/fpga-soc/fpga/igloo-nano)

Londoner, keep posting and challenging, its very good but I differ wrt the use of FPGA vs a dedicated ASIC on some of your points (not all)

Sskim