Oh yes. Definitely imminently!
Actually I do not know. But I cannot imagine it would be a particularly time consuming process.
I believe that what they are referring to is the setting of the timing of the full matrix of pixels so they all actuate at precisely the correct times. This was indicated in the AGM address. The importance of this was stressed because it had been the cause of the "not quite good enough" performance found previously, i.e. before all the corrections had been applied.
I presume that while much of the setup adjustment is a generic pattern for all of the chips, there is likely to be some need to make adjustment tuning that is specific to each chip individually. This will presumably need to be done after the MEMS is integrated into the finished chip and the chip is evaluated by a testing device. One would think this would be done on the fly at a fairly rapid rate as the chips are being exercised and tested. Each chip has 1024 pixels. That implies that 1024 timing values have to be checked and adjusted so that the timing of every pixel matches some preset value and these adjustments would be written into the ASIC to be used by the control algorithm.
It is likely that a few individual pixels may have problems and will have to be turned off so they do not operate at all. I believe the algorithm allows this to be accommodated so that the chip's output is still well able to meet performance specs. It was indicated in the 2018(?) AGM that the matrix array did not need to be 100% perfect to be acceptable as a product. A few dead pixels do not matter that much. A dead pixel on a sound chip is not likely to be as obvious as a dead pixel on a display screen. However it is quite likely that a few pixels that do not act at the correct time would be detectable by the listener.
The chip that comes out from this testing / tuning process presumably gets a big tick and is ready for use.
The question here is how long the 23 wafers, each with a hundred or so dies on them, can be stabilised after production, singulated into dies, integrated into chips and tested favourably so they get given that big tick.
The stabilisation issue was raised at the last AGM (by Yuval I think) as something they had been seeing over earlier batches as they were finished and processed. If I recall and understand it correctly they found that the wafers tested out OK straight after production but began to show some degradation within a few days, presumably after being exposed to a normal air atmosphere. There was presumably some residual chemical reactivity of the MEMS surfaces with oxygen or water vapour that caused damage. Such surface chemistry is unsurprising, and is likely not too difficult to fix - i.e. to stabilise.
So my expectation is that we ought to be able to expect some results in the shorter term rather than a longer term. i.e. days rather than weeks. But I really have no inside knowledge of what is actually going on, so please take my comments with a grain of salt!However I am still happy with the end of September Quarter time frame for "ready to demo" as an expectation.
(20min delay)