Multicore and Multiprocessor SoC (MPSoC) started a new computing era but brought a twofold challenge: building HW easy to use by SW designers and building SW that fully exploits HW capabilities. The main domains addressed at MPSoC are related to adapting HW and SW for better cost, performances and energy efficiency of next generation computing systems. Emerging SW and HW design technologies and architectures combined with advanced semiconductor manufacturing technologies are explored to build energy efficient multicore architectures serving advanced computing (image, vision and cloud) and distributed networked systems. General Chair: Pierre-Emmanuel Gaillardon, University of Utah, USA Program Co-Chairs: Anca Molnos, CEA-LETI, France Yoshinori Takeuchi, Kindai University, Japan Jishen Zhao, UC San Diego, USA European Liaison Frédéric Petrot, TIMA-INP Grenoble, France Nicolas Ventroux, CEA-LIST, France North American Liaison: **riela Nicolescu, Poly. Montreal, Canada Asian Liaison: Shinya Takamaeda-Yamazaki, Hokkaido University, Japan Sungjoo Yoo, Seoul National University, Korea Industry Liaison: Andreas Herkersdof, TUM, Germany Yoshifumi Sakamoto, IBM, Japan Yuan Xie, UC Santa Barbara, USA Local Organization Chair: Tom Becnel, University of Utah, USA Finance Chair: Frédéric Rousseau, TIMA-UGA, France Ken Stevens, University of Utah, USA Publicity Chair: Fabien Clermidy, CEA-LETI, France Koji Inoué, Kyuchu University, Japan Proceedings Chair: Tom Becnel, University of Utah, USA Web Chair: Edouard Giacomin, University of Utah, USA Technical Program Committee: Marcello Coppola, STMicroelectronics, France Raphaël David, CEA-List, France Giovanni De Micheli, EPFL, Switzerland Rolf Ernst, TU Braunschweig, Germany John Goodacre, ARM, UK Kees Goossens, TUE, The Netherlands Masaharu Imai, Osaka University, Japan Koji Inoue, Kyushu University, Japan Tsuyoshi Isshiki, Tokyo Institute of Tech., Japan Ahmed Jerraya, CEA-Leti, France Rainer Leupers, RWTH Aachen University, Germany Youn-long Lin, National Tsing Hua University, Taiwan Takashi Miyamori, Toshiba Corp., Japan **riela Nicolescu, Poly. Montreal, Canada Pierre Paulin, Synopsys, Canada Frederic Pétrot, TIMA-INPG, France Yoshinori Takeuchi, Kindai University, Japan Hiroyuki Tomiyama, Ritsumeikan University, Japan Kees Vissers, Xilinx, USA Norbert Wehn, University of Kaiserslautern, Germany Marilyn Wolf, Georgia Institute of Tech., USA Yuan Xie, UC Santa Barbara, USA Hiroto Yasuura, Kyushu University, USA Sungjoo Yoo, Seoul National University, Korea MPSoC is an interdisciplinary forum bringing together key R&D actors from the different fields required to design Multicore and multiprocessor HW and SW systems. The program brings together experts in major HW and SW architectures (Processor, Memory, I/O, Interconnect, RTOS, GFX, Virtualization, application- (domain) specific acceleration & system architectures), design technologies (parallel programming, rapid prototyping, system design models and tools) and emerging semiconductor technologies (heterogeneous integration, 3D, photonics) to build next-generation thinking that will bridge the gap between HW and SW. Around 60 world class R&D speakers will discuss fundamental and strategic issues to master Software-defined Hardware for energy-efficient and highperformance computing. The program includes keynotes on major HW and SW trends and technical sessions to present strategic directions and state-of-the-art research. The 5-day program will also include in-depth technology challenge presentations and short keynotes followed by insightful panels. All the talks will be given by CTO-level speakers from Industry and world-class professors from Academia. Thanks to its full week format and the high quality of both attendees and speakers, MPSoC is a unique opportunity for executives and senior managers to explore new ideas and refine strategic thinking. MPSoC is the single best event in the world that brings together so many leading thinkers on the future of HW and SW design. It enables great informal networking and interactions with experienced, distinguished researchers and top academic and industrial experts. It builds bridges between different technical areas and corporations, institutes and countries. Finally, it is a unique environment for anyone who wants to share knowledge with researchers and key managers from industry. For registration before May 31, the fee amounts to 1400 USD for regular attendees, 1190 USD for IEEE and EDAA members, and 850 USD for speakers. Each speaker is allowed to invite Junior attendee (student) with a fee of 790 USD. It will cover the documentation, the lunch for five days and dinner for five days including the social dinner. MPSoC’18 FO
18th International Forum on MPSoC for Software-defined Hardware July 29 - August 3, 2018, The Cliff Lodge, Snowbird, UT, 84092, USA KEYNOTES (6) • Rob Aitken, ARM, UK • Vance Checketts, Dell EMC, USA • Paul Joyce, Dell EMC, USA • Ike Nassi, TidalScale, US • Shuichi Yamane, Socionext Inc., Japan • Farhang Yazdani, Broadpak, US IN-DEPTH PRESENTATIONS (18) • Gerhard Fettweis, TU Dresden, Germany • Masaki Gondo, eSOL Co.,Ltd., Japan • Yoshihiko Hirota, Konica Minolta, Japan • Masatoshi Ishii, IBM Research - Tokyo, Japan • K. Charles Janac, Arteris Inc., USA • Shahar Kvatinsky, Technion, Israël • Peter van der Made, BrainChip Inc., USA • Takashi Miyamori, Toshiba Corporation, Japan • Anush Mohandass, NetSpeed Systems, USA • Masahiro Murakami, Konica Minolta, Japan • Yuichi Nakamura, NEC Corp., Japan • Francois Neumann, Safran Electronics & Defense, France • Greg Nielson, Nielson Scientific, USA • Pei-Lin Pai, Winbond, Taiwan • Pierre Paulin, Synopsys, Canada • Yankin Tanurhan, Synopsys, USA • Kees Vissers, Xilinx, USA • Yuan Xie, UCSB, USA MINI-KEYNOTES (38) • Fumio Arakawa, The University of Tokyo, Japan • Gerd Ascheid, RWTH Aachen University, Germany • Kees van Berkel, Ericsson, Eindhoven University of Technology, The Netherlands • Rolf Ernst, Technische Universitat Braunschweig, Germany • Ran Ginosar, Technion-Israel Institute of Technology, Israël • John Goodacre, ARM, UK • Arnaud Grasset, Thales Rese
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