Howie - I dispute your assessment about a lack of transparency
There are some things you cannot cover in company announcements - you can discuss the results of analysis or milestones being met, but you can't, for example, discuss the company's strategy or give commentary on the potential of the tech. You do that in CEO presentations, roadshows etc.
Megabit was achieved last year - that was always the strategy because data could be collected as to the tech's performance under an industry standard template. Industry demanded it to inform a transaction. Any roadshows/discussions before that was achieved would have been a waste of time - decisions about strategy have to be led by the data coming off PL4. So yes, information was slow because we were all hanging on that one fateful day when the company would announce that IMEC had successfully fabbed a functional megabit chip. Since then, we've had an announcement roughly every 3 months about results of analysis - that is a measurable improvement on information flow.
So we've got that now and in addition to the headline read/write speeds and endurance figures, (plus some understanding of retention, which the company has yet to go into any detail) we also have this variable resistance capability, which is completely new and throws up a whole new development fork - that is, something that may facilitate true analogue computing in semiconductor materials. To understand as an uh, analogue against digital computing development - we are potentially where digital computing was in the 1970s, but for analogue computing.
To be clear on why I think this is a big deal - analogue computers have been around for thousands of years - they initially were mechanical (the Greeks built one to model the motion of planets around the Sun), then electrical, using vacuum valves/tubes - but they were complex to run, expensive to build and maintain (every one was bespoke to its task) and in the case of the vacuum tube ones - madly energy hungry. Then we developed transistors, semiconductors and binary logic gates - memory cells and digital technology took off, because it could be reliably mass produced and didn't require someone to crawl through the innards of a van sized computer looking for blown vacuum tubes.
The other thing that I think could be done with this variable memristor capability of the tech is to effectively increase memory density in digital computing, by just needing less memory cells. The current "smaller nm to increase memory density" fixation matters less when you could say, increase memory density by expressing a single byte of information (8 bits, that is 8 memory cells of digital data) in a single RERAM memory cell. To do that you need to have 256 resistance "levels" from 0 - 255 (0 to 11111111 in binary, or 0 - FF in hexadecimal) within a single RERAM cell. So a 20 nm RERAM memory array, using that variable capability would have the same effective density as a 7 nm binary memory array.
This is where 4DS need to be explaining what we have on our hands (am I right here?) and what they plan to do to advance this technology.
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