thnaks@Flectional, in that blog post it says:
"Weebit ReRAM isn’t yet integrated into the ECS-DOT SoC, so the proof-of-concept demo shows a two-chip solution with the 22nm Weebit demo chip communicating with the EMASS chip over an SPI bus. In an end solution, the ReRAM would be integrated on-chip..."
Anybody heard when/if the integration may be planned/happening?
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