Industry related on topic, page-1063

amorphous polycrystalline heat controlled switching
high cost volume
advanced cmos process


this is more aligned to 4DS switching technology and if ST can scale further they may achieve DRAM class memory architecture as a non volatile competitor
underlying reason for developing Ge 2 Sb 2 Te 5 is to increase the cycle numbers to +10 ⁹
while maintaining fast switching (20 ns).

major failure mechanism is switching issues affecting the low resistance state - void formation occurs in the 'bulk area' over the bottom electrode relative to the change in 'mass' density between the polycrystalline and amorphous states....so every switching cycle incurrs degradation
Element segregation can also occur ( annealing failure) due to operational temperature differentials

with all this in mind its a unique breakthrough in switching technology

DYOR