As I have already posted Zog this link below says what IQE intended to do with some of the technology that Translucent sold to them, 87 patents out of the 120 that IQE have, you need to read very carefully to understand what they were going to do back then and what they say they are doing in the Needham release.
ENABLING NOVEL COMPOUND MATERIALS ON SILICON
In September 2015 IQE announced that it had signed an agreement for the exclusive licence of Translucent's unique and innovative crystalline Rare Earth Oxide (cREO™) technology along with an option to subsequently acquire the technology. Translucent's cREO™ technology offers a unique approach to the manufacture of a wide range of innovative CS on Silicon products, including GaN on Si for the burgeoning Power Switching and RF markets.
The technology is protected by a wide ranging IP portfolio consisting of 74 granted patents, and 13 additional patent applications.
The cREO™ technology provides a unique buffer or interface layer to integrate GaAs, InP, GaN and other Compound Semiconductors with Silicon, allowing the potential of producing compound semiconductor epitaxial layers on lower cost Si wafers up to 300mm diameter and opening up the possibility of integrating CS performance and functionality with existing CMOS processing capabilities for true next-generation system-on-chip devices.
Now go back and read the bit in red above, see where it says 300mm wafer and lower costs? The reason for that is that IQE could not make 300mm Si wafers when they were using Cut Silicon, the 300mm wafer is virtual Silicon (cSOI), it is much cheaper, and also because they can use the lattice matching that Translucent Inc licensed from one of the US Uni's ( I believe it was tin back then? may be different now, perhaps aluminium?) which makes the wafer far more stable during cooling after the epitaxy has been included on top of the wafer, this was the breakthrough or should I say breakthroughs that IQE needed in order to go to 300mm i.e. cSOI (virtual silicon) much cheaper substrate than cut Silicon and also the lattice matching that allowed the step up to 300mm wafers, this will give them almost twice the number of chips than what they could produce on 200mm cut silicon using IQE tech.
That red bit on the R/H chip shown below is the lattice matching to allow the attachment the epitaxial layers on to the Silicon Substrate (virtual Silicon) which in turn is far better for the Silicon chip during the cooling process after exitaxy, that is the cREO approach.
If IQE are using 300mm wafers? then they are using Translucent cREO technology IMHO, I believe that is a given! and if you look at what areas cREO is adaptable to i.e. Wireless, Photonics, Infrared, Solar, Power and CMOS++, then IQE are on a winner and so is Silex for the upcoming royalties!
(20min delay)
