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Podcast 4DS, page-108

  1. 4,280 Posts.
    lightbulb Created with Sketch. 8310
    not concerned at all with what is about to unfold - important to remember the Guido A in all this, His relationship with IMEC goes back several decades across several deals and research projects (power escape etc) - he is in essence the main TA behind all of this ...
    IMEC's estimation of GA ....

    GA and IMEC were doing system optimisation algorithms for commercial return before the indusrty had even heard of such a thing
    2004
    “Given the vast experience and in-depth market knowledge of Guido Arnout, who is well known and well respected in the electronics and EDA industries as founder and Chairman of CoWare and co-founder and President of the Open SystemC Initiative (OSCI), we are confident that PowerEscape will be successful in taking this technology to market,”
    said Rudy Lauwereins, Vice President of Design Technology for IMEC's Integrated Information and Communications Systems division.

    yes its back in the day -well that relationship is stronger today than its ever been - suspect DM by necessity is the front man but knowing GA is still there has always been pretty big for me in all this.

    2017
    In a telephone interview with EE Times, 4DS CEO Guido Arnout said now that after scaling down to 40nm and showing both predictability and repeatability, 4DS felt it was the right time to approach IMEC with its unique cell. The collaboration will demonstrate 4DS’ production backend-of-line (BEOL) process on IMEC’s CMOS megabit memory vehicle processed at 300mm wafers to make 1Mb devices, he said.

    JD had to pull back
    KH came and went
    The Dr came and went

    GA is the single TA constant and key for me
    so now the thing is running like a swiss watch at 60nm in the megabit array
    testing continues as it has too to define the operational parameters
    the potential market?
    the Dram guys are consolidating NAND and staking it up to increase the densities to gain operational efficiencies AND reduce cost...this is increasing the block size of NAND in order to use fewer blocks gaining performance advantage across read write and erase in reduced area - this reduces peripherals creating area gain OR smaller layouts...which ever is required by application.
    the 4DS offering potentially now supersedes this NAND stacking and the all the advantages listed above delivering cost advantage on that exisiitng model and positive revenue across generational development into the future ...that is the sales point
    that is the killer application in my mind ....that is what you're looking for for that differentiation

    DM stated clearly again as 4DS has always stated DRAM can't be bettered and flash is at its limits - slot this 4DS offering into that gap with cost and revenue advantage and you have some very interested parties in the tech I'de imagine....this is the opportunity

    Let IMEC do its thing and perhaps a very nice agreement going forward transpires ......as well informed posters here suggest why invite DM for a face to face .....what? to say we need more r&d???
    What a waste of IMEC's very valuable time and reputation


    something to ponder




 
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