re that time delay is costly traditional model general purpose programming model + instruction set run across hpc is choking undder the load of increasing data loads as well as LLM data
data transfer speeds - cpu on the left / system ram on the right above L2 and L1 cache
system bottle neck is that 100ns exchange between cpu and system ram - cpu 'waits' for that to execute before it actions next operation ( as does the gpu) - software and hardware optimisations can only go so far - and cant keep up with the data generated
A personalised tool to help users track selected stocks. Delivering real-time notifications on price updates, announcements, and performance stats on each to help make informed investment decisions.
(20min delay)