believe they have the required selector in development as per Oct 13 2022 release
caught your question and thought it was a beauty - think it more likely caught CH on the hop a little rather than maybe deliberately fluffing
as per that release
In a memory array, the role of a selector is to ensure that only the specific cells which should be accessed actually are, and all other cells are disconnected and not impacted. Embedded designs currently use a transistor as the selector device, but transistors increase the cell area of a memory bit and therefore cannot support the high densities required for discrete chips. In addition, future embedded applications such as edge AI and automotive will require far larger memory arrays and could benefit from an optimized selector that enables higher densities.
Developing cost-efficient selectors using only standard materials and tools is a significant challenge, but it has the potential to further minimize manufacturing cost and complexity. While additional development is still required, this new selector technology could be easily integrated into any CMOS fab, potentially enabling the high-capacity memory arrays needed while keeping size and power to a minimum.
'while additional development is still required'....
so i don't think its a technical barrier but do think they realise the importance now for revenue contracts to be signed and that is the focus area - the work going on with the array optimisation to deliver quality endurance data for customers ( based on customer need and feedback for their application ..)seems to have taken priority which makes sense ....customer focus on embedded solutions to get to revenue to underpin the current business operation so inhouse developments on the tech can then also be funded in that increasing revenue stream
just my opinion and I could be wrong of course
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