none of the others have the following:
this was recently presented by GM
28nm node. Low raw BER approaching 105 without ECC or redundancy is achieved.
106 cycles endurance without significant window degradation is shown.
A stable memory window after 15h bake at 210°C after 10kcycles, which is one of the best results reported
so far to our knowledge.
Technology passed basic (3x reflow) and extended (9 cycles) SMT tests with zero failures.
Bitcell and memory stack engineering improved the window margin statistics. Optimized forming protocols are developed to
increase memory yield over cycling.
Program and verify algorithms allowed to insure no overlap between high and low
resistive states on 1Mb arrays.
Weebit 28nm ReRam can endure more than 4-σ distributions at 105 cycles with sufficient margin and no memory window
degradation (fig.1). Again, in this case, no program & verify algorithm was used, showing the intrinsic quality of the
technology and memory stack.
just a small window into what is developing with this exceptional startup
glah
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