Weebit - 2021and beyond, page-7889

Hi fearlessninja :
Part your post ' My thoughts are that they have found an application specific sweet spot ----'


--- fearless - one --- I have little (if any) idea of what this is but from the announcement - this was stated :-last para on 1st page Hope this is in tune with your comments

The ReRAM module was designed in the ST 130nm process after interaction with potential customers
showed it is the sweet spot for their analog, power, sensor and IoT designs. It includes a 128Kb ReRAM
array, control logic, decoders, IOs (Input/Output communication elements) and error correcting code
(ECC).


Also found this of interest :-at end of report)
• Tape-out: The final phase of the chip design process in which the design is released to
manufacturing.
• System-on-Chip: As the size of digital elements shrinks, it is common to put a full system,
including processor, communication, memory and other dedicated elements on a single piece of
silicon.
• Qualification: The process in which the fab ensures that a design is ready for mass production
and complies with its specifications. This includes ensuring that it is stable, operates reliably as
designed and meets yield targets and quality standards.