From the paper" our solution turns out to be 10 times less...

From the paper
" our solution turns out to be 10 times less expensive, as it requires 10 times less synaptic elements (the number of computing elements is directly proportional to the area/power consumption)."

Of course it goes much further than that. In their statement they are referring only to the improvement in learning efficiency of the neural-synaptic architecture. However, the neural-synaptic architecture in current systems is virtual, running as software on a Von Neumann machine. The Von Neumann architecture has the well known cpu-memory bottleneck, and is very power-hungry in terms of the CMOS devices from which it is built. This from the paper:

"the first hardware setup of AlphaGo required 1920 central processing units (CPUs) and 280 graphics processing units (GPUs), with a peak power of half a megawatt."

An equivalent hardware neural network built up from WBT ReRAM cells, could in the future reduce this system down to perhaps a single chip consuming just a few watts - approx 5 orders of magntude less. The neural-synaptic architecture described in the paper achieves a further order of magnitude reduction in size (and consequently of power consumption) due to greater efficiency.

This could equally apply to a Von Neumann (hardware) architecture by changing the software. But of course the truly disruptive change is the leap from virtual neural networks to hardware-based, and WBT's technology looks to be the obvious choice for this new hardware-based architecture.