In the near term Weebit plans to introduce a 22nm version of its technology. Farther out it plans for a transistor-based cell to be adopted as an embedded memory to take the place of NOR flash at processes where NOR doesn’t exist because of scaling issues.
In brief, this is any process technology smaller than 28nm, after which FinFETs replace standard planar FETs.
Also, over the longer term, the company plans to use cross point arrays, and stacked cross point arrays, to produce a cost-effective nonvolatile memory that approaches DRAM speeds for both read and write.
These will be based on the 2-terminal selector that Weebit and Leti have co-developed.
https://thememoryguy.com/weebit-moves-ahead-step-by-step/
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