great post ....it really got my attention and the link below might really interest you ...hope so anyway
I think the AI bot forgot to mention it brings wbt reram alongside dynamic ram in the storage hierarchy due to its computational neuromorphic function ( may as well be a logic memory combo imo ...just imagine!)
I've been looking for the Dram crossover for weebit and imo you ( and the bot) have nailed it ....potentially they are on the cusp ( 3 yrs which you mentioned seems a realistic window) which will see Dram vendors looking over their shoulder and furiously punching numbers .....
combine Reram memory data storage and Neuromorphic computational capability in a single SoC is imo that major crossover point mitigating the usual competitive pain points of meeting dynamic ram .....this is easily achieved in a wbt array / sub array configuration incorporating multi level cell programming and leverages the now well known other weebit competitive advatages ....
( market segment capture potentially = $$$$$$)
https://seal.ece.ucsb.edu/sites/default/files/publications/prime_tr_main_2.pdf
its out of the University of California and printed in 2016 but very exciting from weebits development pathway in 2023 and beyond....
enjoy
Weebit - 2023 and beyond, page-367
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