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AKIDA Hardware Constraints

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    BrainChip's userguide includes documentation about AKIDA's hardware constraints which is quite informative https://doc.brainchipinc.com/user_guide/hw_constraints.html
    It may be that there has already been some discussion of this on the forum - if so my apologies. But I thought it would be useful to start a thread for this topic anyway.

    The documentation starts by noting that "While working with CNN2SNN and the Akida simulator, only few limitations are imposed. When mapping a model to the Akida hardware, not all Model and Layer configurations are supported." This makes perfect sense. The Akida Software Simulation system was developed before the hardware was finalized, so it is normal that it would not need to have the limitations of the actual chip.

    It also has separate sections for the Preproduction chips and the Production versions, and this makes it clear that for the preproduction version "The InputConvolutional layer type is not supported", meaning that it was presumably not able to process images. Fortunately, this limitation was removed for the production version, which seems to be able to process images up to 256 pixels across. Unless I'm mistaken, this means that there are significant restrictions on the areas where an AKIDA based system could be used. Maybe multiple AKIDA chips could be used to process larger images - such as a standard VGA image which is 640*480 pixels (perhaps someone knows something about this?). But Full HD or 4K images would presumably not be an option.

    A second hardware constraint is imposed by the maximum dimensions that can be processed using the FullyConnected mode. According to the documentation, the maximum input array size is 81920, but it also specifies that the input activation and weight values can each use 1, 2 or 4bit accuracy. I imagine that maximum size would be for the case where input activation and weight values are both 1-bit. Increasing the resolution would presumably reduce the maximum array size such that with 4-bit activations and weights, the array size would be reduced by a factor of 16 to 5120.

    Unfortunately, the hardware constraints documentation doesn't say what happens when there is more than one neuron. It could be that the maximum value of 81920 is only possible if only one neuron has been implemented, and that the number would be reduced if more neurons are required. One possibility is that you might split the inputs between the 80 Neural Processor modules on the chip - which would mean that each NPU could have 1 neuron with 1024 inputs (because 80*1024 = 81920).

    This is pure guesswork on my part because the documentation doesn't cover this question. For example, it's possible that each NPU can have a neuron with a full set of 81920 inputs. I don't know. It's actually quite important because the AKIDA's on-chip learning presumably requires the FullyConnected mode. This may explain why the demos only seem to use relatively small numbers of different object classes (Tiger, Elephant etc). But it would be pretty simple for anyone that actually has a development system with a real AKIDA chip on it to see what happens if you try and configure more neurons.

    So, can I invite anyone reading this forum (including people working at BrainChip) to post any hard information using this thread. Message to BrainChip staff - this could be done anonymously!

    I'm really hoping to get more hard data about the chip and what it can do. It would be nice to move beyond the "1.2 million neurons and 10 billion synapse" figures that have been used in the sales blurb for years. Now that the chip exists and testing of the production chip has been completed (as announced on the 8th of November https://brainchipinc.com/akida-production-version-testing-completed/) it would be nice to learn a bit more.
 
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