Ann: S&P DJI Announces March 2021 Quarterly Rebalance, page-101

Hey brother, well we've just sailed past the 15th which was 7 weeks from ann start date 27/1.

And based on assumptions of the first lot (noting 30/9 was last day of the reported qtr, plus it was a Wed which was the same as the 27th & with OCD kicking in hard it's my possible best omen guess) 6 weeks was too short a period and most likely it was circa 10 weeks based off a 10/12 completion date..

Though it was noted that fast Willy joined the team circa 7/10 as per ann and was immediately excited by the company's stage of development so the start could be a fraction earlier. But due to the over run on expected delivery times I don't believe they went early..

So I'll take a punt and say within the next 3 weeks, but remembering that the plat lots are more difficult although there is only half the amount (12) then manufacture time might come back a fraction and I reckon March sees us poppin the odd Carlsberg & pizzin in each others pockets.

Then assuming they had roughly a week to finalise any and all changes from final analysis results then that process would appear to be around 42 days or 7 weeks. Fine be me, coz we can then sell in May & go away as they say...

Not sure how the Doc's sellin the sizzle at the moment, covid having ruined all the usual seminars & strip club after sales parties of times gone by..

Anyone checked Ebay or what ever the online semiconductor chip equivalent to Gumtree is... He might be taking orders and just managing expected delivery windows..

Yeah, yeah, we got the stock... 6 week in country delivery time, direct from the factory...

Does it work? Maaaaaate!! Ya don't get a 100% seller rating by rippin peeps off, or selling designer fakes.. Trust me! hehe

	Days from 24/6/20	10/08/2020	47	4DS Memory Limited (ASX:4DS) (4DS) (the Company), is pleased to summarise a development strategy agreed between the Company, imec and HSGT following a series of discussions over the past few months which culminated in meetings from 27 July to 4 August 2020.
1				Testing of the Initial Platform Lot validated the integration process steps required to integrate 4DS memory cells with imec’s megabit platform. The information gathered from this testing has enabled 4DS to identify which process steps will be further tuned, to benefit future platform iterations.
2				As such, the Company now proposes to start fabrication of two sets of wafers this quarter on imec production equipment. imec will manufacture one lot of twenty-three (23) Non-Platform Wafers (Second Non-Platform Lot) and one lot of twelve (12) Platform Wafers (Second Platform Lot). The manufacture of these two lots of wafers is a priority for imec.
3				The objective of the Initial Platform Lot was to test the integration of dense memory arrays without the complexity of transistors. 4DS validated the integration process, and recent meetings and discussions have identified process steps and conditions that are designed to benefit the fabrication of the Second Platform Lot. Significantly, the outcome of development discussions is that the Second Platform Lot will be fabricated to contain dense memory arrays with transistors that are able to select memory cells. This is a major strategic decision to better ensure success in 2021 when, based on the results of this Second Platform Lot, 4DS and its partners will potentially progress to fabricate wafers with all the control logic necessary to read and write selected bits and bytes, and therefore be able to operate as a fully functional megabit memory. Both lots of wafers will be fabricated with variations of the process conditions from the best wafer in the Additional Wafers Lot, which had exhibited the biggest improvements in speed and endurance in the Company’s history.
4				Timing The fabrication of both lots of wafers will commence this quarter. Barring any unforeseen equipment problems or new COVID-19 government ordinances, the Second Non-Platform wafers should be available for analysis in mid to late Q4 2020. Due to fabrication complexities related to the inclusion of transistors in the Second Platform Lot, the wafers from the Second Platform Lot are expected to be available for testing in early Q1 2021. The results from both wafer lots will define the Company’s 2021 strategic development plan to achieve its goal of fabrication of a megabit chip and/or a corporate transaction. COVID-19 Update The Company continues to monitor COVID-19 restrictions in all the locations in which it operates. If new restrictions are implemented in any location, and to the extent it has a significant effect on Company operations, shareholders will be informed as soon as possible. Currently, there are no restrictions affecting the Company’s operations.
5	Weeks	Date	Days
6	Latest	30/09/2020	51	Wednesday Last day of the Qtr identified to start (refer ann 10 Aug)
7		28/10/2020		Started 2nd non platform some point prior and assumed to be 30/9 at latest
8				As stated in 4DS’ announcement dated 10 August 2020 following consultation with imec and Western Digital, the Second Platform Lot wafers are being fabricated so as to contain dense memory arrays with transistors that are able to select memory cells.
9				Timing on track the Second Non-Platform Lot wafers should be available for analysis in mid to late Q4 2020; the Second Platform Lot wafers are expected to be available for testing in early Q1 2021.
10	10	10/12/2020	71	Successfully Manufactured 2nd non plat lot (Now know that the inference to success was the thing worked with process splits.)
11	6	10/12/2020	42	Successfully Manufactured 2nd non plat lot (Now know that the inference to success was the thing worked with process splits.)
12				The process of agreeing to timetables and costs may take the parties past the expiry date of the current agreement, being 1 January 2021 . The Company will update the market once the extension has been finalised.
13				Based on the very limited available time slots on imec’s state of the art equipment, imec committed that the Second Platform Lot wafers will commence mid Q1 2021. 4DS is investigating all means to bring that timing forward.
14				As stated in the Company’s ASX announcement dated 28 October 2020, the analysis of Second Non-Platform Lot and Second Platform Lot will potentially enable 4DS and its partners to progressto fabricate wafers with all the control logic necessary to read and write selected bits and bytes, and thus be able to operate as a fully functional megabit memory
15				4DS advises that both Belgium and the San Francisco Bay Area counties, which includes Silicon Valley, have again had restrictions put in place which are aimed at slowing transmission of COVID-19 after an acceleration of COVID19 infections. The Company continues to monitor these restrictions and will update the market if they are expected to have a significant adverse effect on the Company’s operations.
16	6	20/01/2021	41	Further to the Company Update on 10 December 2020, 4DS and imec have agreed on the refinements to the process conditions for the Second Platform Lot wafers, which are expected to mitigate risks at various stages in the fabrication process. imec has confirmed that the production of the Second Platform Lot Wafers will commence by mid Q1 2021, and 4DS and imec are currently in discussions regarding available time slots and the precise start date.
17				4DS and imec are in the process of finalising the terms of the extension to their collaboration agreement for 2021. The Company will update the market once the extension has been finalised.
18				The results of the analysis of the Second Non-Platform Lot and Second Platform Lot will pave the way for 4DS and its partners to pursue their strategic objective to fabricate wafers which operate as a fully functional megabit memory
19		27/01/2021	42	Commenced manufacture 2nd platform lot (12 wafers)- split process 27-01-21 48 days after confirmed manufacture (Wednesday)
20		1/02/2021		Production of the Second Platform Lot commenced at imec on 27 January 2021 (assumed to take between 42 days-6 weeks & 71 days 10 weeks)
21				Results from this Second Platform Lot are expected in Q2 of 2021 (Due finis on 10-03-21 and analysis concluded circa 21-03-21)
22				Confirmed that the Company has been able to repeat the results for each of the key memory characteristics (speed, endurance and retention) that were achieved with the First Non-Platform Lot; which provides 4DS with further valuable insights with respect to how changes in key process parameters affect these key memory characteristics; i.e. which changes increase which memory characteristic.
23				The learnings from the Second Non-Platform Lot have been incorporated into the process split conditions for the Second Platform Lot of 300mm wafers. The Second Platform Lot is using imec’s memory platform, and contains dense memory arrays with the control logic necessary to read and write selected bits and bytes
24				The results from the analysis of the Second Platform Lot are expected to pave the way for 4DS and its partners to pursue their strategic objective of fabricating wafers with chips that operate as fully functional megabit memories, and which have been produced using state of the art industry fab equipment. If successful, this may bring 4DS closer to its 2021 objectives to achieve a potential corporate transaction.
25				4DS’ Managing Director, Dr Guido Arnout stated that “We are pleased that the success of the Second NonPlatform Lot has meant that we were able to immediately commence fabrication of the Second Platform Lot. We are grateful to our partner, imec, for scheduling a slot in its state of the art fab in such a timely manner, particularly given the high demand for access to fab equipment in the current semiconductor market environment.”
26				Drs. Wilbert van den Hoek, 4DS’ Chairman, commented “Industry players want to know that a new memory technology can be produced commercially, using industry standard fab equipment. 4DS is well advanced on this path, and the commencement of the Second Platform Lot is another significant step forward.”
27	6	10/03/2021	42
28	7	15/03/2021	47
29	8	22/03/2021	54	Poss Fin manufacture (based omnn previous assumption of time taken)
30	9	31/03/2021	63
31	10	8/04/2021	71
32
33	6	3/05/2021	42	Poss Fin Analysis (based on previous assumption of time taken)
34	6	12/05/2021	42
35	6	20/05/2021	42