Hi MC, Main difference is that MemryX use analog...

Hi MC,

Main difference is that MemryX use analog ReRAM/Memristors in their NN.

Fig 31 (31/32) shows a plurality of processors 2220 - 2250 accessing a common memory 2210 via arbiter 2260 which allows the processors to access the memory "in turn". this is the definition of the vob Neumann bottleneck.

In addition, the transfer of data between processors (Fig 30) is dependent on a "handshake", a preliminary signal to allow data transfer between processors, which adds some delay. In Akida, the data flow between NPUs is freewheeling in that it does not depend on an exchange of preliminary signals between NPUs.

In relation to:
"In addition, the memory region 2210 can utilize a multi-bank architecture to facilitate access by the plurality of processing cores 2220-2250. Each bank can support access by a corresponding processing core, so that the plurality of processing cores 2220-2250 can access the memory region 2210 simultaneously"

... this is exactly what Ella has been on about all this time:

"Tain't what you do - it's the way that you do it."

In patent law, it is not sufficient to state that you do something - you must explain how it is done.